The present disclosure relates to marking microelectronic devices having a microelectronic die including an integrated circuit; more particularly, several aspects of the invention are related to marking packaged microelectronic devices and bare dies used in microelectronic devices.
Microelectronic devices, such as memory devices and microprocessors, typically include a microelectronic die or xe2x80x9cchipxe2x80x9d encased in a plastic, ceramic or metal protective covering. The die can include memory cells, processor circuits, interconnecting circuitry and/or other functional features. The die also typically includes an array of very small bond pads electrically coupled to the functional features. When the die is packaged, the bond pads are coupled to leads, solder ball pads or other types of terminals for operatively coupling the microelectronic dies to buses, circuits and/or other microelectronic devices.
Several different techniques have been developed for packaging microelectronic dies. The dies, for example, can be incorporated into individual protective packages, mounted with other components in a hybrid or multiple chip modules, or connected directly to a printed circuit board. In many packaging applications, the bond pads on the die are coupled to a lead frame or a ball-grid array using wire bonds or by directly pressing the bond pads against contacts. After coupling the bond pads to a lead frame or a ball-grid array, the dies can be covered with plastic, ceramic or other types of protective materials. Dies that are mounted directly to the substrates are generally called Chip Scale Package (CSP) devices or Flip Chip Bare Die devices.
Microelectronic device manufacturers typically fabricate a plurality of dies on a wafer and then cut the wafer to separate the dies from one another. After fabricating the dies, manufacturers generally perform additional operations in which they handle and test (a) wafers having a plurality of dies, (b) individual dies after they have been singulated, and (c) individual dies after they have been packaged. The basic operations that a manufacturer performs after fabricating the dies include backside preparation, die separation, die picking, die inspection, die attachment, wire bonding or flip-chip attachment, preseal inspection, package sealing, plating, trimming, final tests, and other procedures. Throughout several of these procedures the individual dies and the packaged dies are marked with fiducials and identification marks because many of the procedures for packaging the dies are performed by machines that use machine-vision technology to identify and accurately position the dies. Therefore, the fiducials and the identification marks should accordingly be clear, well-defined marks that can be. accurately recognized by the machine-vision equipment.
Conventional marking systems for marking bare dies include a laser that changes the color of the silicon on the backside of a die. One conventional marking system specifically uses a laser having a wavelength of 1,064 nm, but other marking procedures alternatively use lasers with a wavelength of 532 nm. Conventional marking systems that use lasers to change the color of the silicon may have many drawbacks.
One drawback of conventional laser marking systems is that the marks on the silicon may not have sufficient clarity to be accurately recognized by the machine vision equipment. As a result, machine-vision devices may not accurately identify or position the dies during a processing operation. Conventional marking systems may accordingly inhibit-the processing equipment from effectively working on a die or a package.
Another drawback of conventional laser marking systems is that the lasers may damage the dies. At least one microelectronic device manufacturer has determined that a 1,064 nm laser may damage the integrated circuits on certain dies. Additionally, if other wavelengths of radiation are operated at higher power settings to produce darker marks, then these lasers may also damage the integrated circuitry. Therefore, conventional laser marking systems may damage the dies at the very end of the fabricating process after a considerable amount of time and money has been expended to produce the dies.
Still another drawback of conventional laser marking systems is that it is time consuming to mark bare silicon dies as well as packaged devices. In a typical application, a laser may make the marks at a xe2x80x9cscan ratexe2x80x9d of a few hundred millimeters per second. Although such scan rates are relatively quick, it may still require a significant amount of time to mark a large number of dies. Therefore, conventional laser marking systems may become a bottleneck for processing and packaging finished dies.
Another aspect of marking dies is to protect manufacturers of genuine microelectronic devices (xe2x80x9cgenuine partsxe2x80x9d) from counterfeit parts manufactured by unscrupulous fabricators. Many genuine part manufacturers expend a significant amount of money to research and develop smaller, faster and more reliable devices. Such research and development generally results in proprietary devices, but it may be relatively easy to reverse-engineer the genuine parts. As such, it is relatively common to find counterfeit semiconductor parts that have been copied from the genuine parts. The counterfeit parts often not only have the same components and circuitry as the genuine parts, but they also generally carry the same visible markings and trademarks as the genuine parts. As a, result, counterfeit parts are typically passed-off to customers as genuine parts that were produced by a genuine part manufacturer.
Manufacturers of genuine parts accordingly lose a significant amount of revenue because of counterfeit parts that are passed-off as genuine parts. Counterfeit part manufacturers can sell counterfeit parts at lower prices than genuine parts because they do not have large research and development costs. As a result, the genuine part manufacturers typically lose a significant amount of market share to counterfeit parts that are passed-off as genuine parts in the marketplace.
The reputation of a genuine part manufacturer may also be damaged by the passing-off of counterfeit parts. The counterfeit parts are often inferior to the genuine parts because the counterfeit part manufacturers may not use the same materials, manufacturing processes, and/or quality control testing as the genuine part manufacturers. Moreover, the counterfeit part manufacturers typically cut corners because their customers send any warranty claims for failed counterfeit parts to the genuine part manufacturer. The reputation of the genuine part manufacturer accordingly suffers because the poor quality of the failed counterfeit parts is attributed to the genuine part manufacturer. This also increases the costs for a genuine part manufacturer because it typically replaces the faulty counterfeit parts under its warranty. Therefore, it would be desirable to deter the proliferation of counterfeit microelectronic parts to protect the large research and development expenses incurred by genuine part manufacturers.
The present invention is directed toward marking microelectronic devices to identify and handle wafers, bare dies and packaged devices. The microelectronic devices can be bare dies or packaged dies. In one embodiment, a microelectronic device includes a first exterior surface, a second exterior surface having a contact array with a plurality of contacts, and an integrated circuit coupled to the contacts. The microelectronic device can further include a marking medium applied to the first exterior surface of the device. One embodiment of the marking medium includes a contrast film section having an underlying contrast film applied to the first exterior surface and an outer contrast film attached to the underlying contrast film. Another embodiment of the marking medium can include a contrast film section having only an outer contrast film applied to the first exterior surface of the device. The outer contrast film can have a high optical contrast with respect to the underlying contrast film or the first exterior surface of the device, and the outer contrast film can be changed by a selected radiation so that a portion of the outer contrast film can be selectively removed from the device. The marking medium can optionally include a transfer medium attached to the contrast film section.
Several embodiments of the invention are directed toward methods of marking a microelectronic device having a microelectronic die including an integrated circuit. In one embodiment, a marking method can include applying a marking medium to a surface on either the microelectronic die or a package that encases the microelectronic die. The marking medium can have an outer contrast film that has a high optical contrast with respect to a material immediately under the outer contrast film. This embodiment of the method can also include selectively removing a portion of the outer contrast film to leave a patterned portion on the microelectronic device. The patterned portion of the outer contrast film that is left on the microelectronic device and the material immediately under the outer contrast film define a mark on the microelectronic device.
Several embodiments of the present invention are also directed toward providing a hidden identification mark that can be observed using a selected exposure energy or another type of exposure energy source. One embodiment of a microelectronic device comprises a microelectronic die having an integrated circuit, a hidden marking layer superimposed relative to the die, and a cover layer over the hidden marking layer. The hidden marking layer can be applied to a surface of the die and/or a surface of a package encasing at least a portion of the die such that in either situation the hidden marking layer is superimposed relative to the die. In one embodiment, the hidden marking layer is a material that (a) can be removed by a scribing energy (e.g., consumed, ablated or otherwise displaced), and/or (b) is at least partially opaque and/or reflective to an exposure energy. The hidden marking layer can also have a depression defining an identification mark through which at least a portion of the exposure energy can penetrate. The cover layer hides at least a portion of the marking layer over the depression. The cover layer can be a material that is (a) generally not removed or otherwise displaced by the scribing energy, and/or (b) at least partially transmissive to the exposure energy.
Another embodiment of a microelectronic device having a security feature comprises a microelectronic die having an integrated circuit, a hidden marking layer superimposed over the die, an underlying contrast layer on the marking layer, and an outer contrast layer on the underlying contrast layer. The hidden marking layer can be composed of a material that is removed or otherwise displaced by a scribing energy and is at least partially opaque to an exposure energy. The underlying contrast layer is resistant to consumption by the scribing energy and is generally transmissive to the exposure energy. Additionally, the outer contrast layer can be consumable by the scribing energy, transmissive to the exposure energy, and have a high optical contrast relative to the underlying contrast layer.
In operation, a microelectronic device is fabricated by applying the marking layer so that it is superimposed relative to a surface of the die. The cover layer can be pre-attached to the hidden marking layer such that both the hidden marking layer and the cover layer are applied to the microelectronic device at the same time. The cover layer can alternatively be applied to the hidden marking layer after the hidden marking layer has been deposited onto the device. One embodiment comprises forming a hidden mark in the marking layer by passing a scribing energy through the cover layer to consume a portion of the hidden marking layer. The scribing energy generally does not alter the cover layer such that the hidden mark formed in the marking layer cannot be visually observed. The hidden mark, however, can be identified by exposing the die to an exposure energy that passes through the cover layer, but is at least partially blocked by the marking layer such that the mark formed in the marking layer can be detected.